S.C. Terry, J.M. Rochelle, D.M. Binkley, B.J. Blalock, and D. Foty, "Comparison of a BSIM3V3 and EKV MOST Model for a 0.5um CMOS Process and Implications for Analog Circuit Design," to appear in the Proc. of the 2002 IEEE Nuclear Science Symp.

M.N. Ericson, J.M. Rochelle, C.L. Britton, B.J. Blalock, A. Wintenberg, and D.M. Binkley, "Noise Behavior of MOSFETs Fabricated in 0.5-micron Fully-Depleted (FD) Silicon-on-Sapphire (SOS) CMOS In Weak, Moderate, and Strong Inversion," to appear in the Proc. of the 2002 IEEE Nuclear Science Symp.

B.K. Swann, J.M. Rochelle, D. M. Binkley, B.S. Puckett, S.C. Terry, B. J. Blalock, K.M. Baldwin, E. Breeding, M. Musrock, and J. Young, "A Custom Mixed Signal CMOS Integrated Circuit for High Performance PET Tomograph Front-End Applications," to appear in the Proc. of the 2002 IEEE Nuclear Science Symp.

LK. Yong, B. J. Blalock, S. Terry, B. Dufrene, and M. Mojarradi, "Complementary Body Driving - A Low Voltage Analog Circuit Technique for SOI," to appear in the Proc. of the 2002 IEEE Int. SOI Conf.

M.N. Ericson, J.M. Rochelle, M. Bobrek, C.L. Britton, A. Bobrek, B. J. Blalock, R. Schultz, and J.A. Moore, "2nd- and 4th-Order åD Modulators Fabricated in 3.3V 0.5mm SOS-CMOS for High-Temperature Applications," to appear in the Proc. of the 2002 IEEE Int. SOI Conf.

B.J. Blalock, S. Terry, B. Dufrene, C. Durisety, LK. Yong, S. Cristoloveanu, and M. Mojarradi, "An Overview of Circuits & Devices Research on SOI for Analog/Mixed-Signal Systems," invited paper to appear in the Proc. 2002 IEEE Midwest Symp. Circuits & Syst.

J.W. Bruce, J.E. Creekmore, S.R. Porter, R.P. King, and B.J. Blalock, "Adaptive Design Method for Efficient Direct Digital Synthesis," to appear in the Proc. 2002 IEEE Midwest Symp. Circuits & Syst.

B. J. Blalock, S. Cristoloveanu, B. M. Dufrene, F. Allibert, and M. M. Mojarradi, "The Multiple-Gate MOS-JFET Transistor," accepted for publication in the Int. J. of High Speed Electronics and Systems.

M. C. D. Smith, J. B. Casady, P.B. Shah, B. Dufrene, B. Blalock, and S. E. Saddow "Dual-Gate 4H-SiC JFET Development," Proc. of the International Conference on Silicon Carbide and Related Materials 2001, Tsukuba, Japan, November 2001.

J.A. Bell, J.W. Bruce, B.J. Blalock, and P. Stubberud, "CMOS current mode flash analog to digital converter," Proc. 2001 IEEE Midwest Symp. Circuits & Syst., pp. 272-275, Dayton, Ohio, August 2001.

J.E. Creekmore, S.R. Porter, J.W. Bruce, and B.J. Blalock, "Direct digital frequency synthesis using nonlinear digital-to-analog conversion," Proc. 2001 IEEE Midwest Symp. Circuits & Syst., pp. 897-900, Dayton, Ohio, August 2001.

S. A. Jackson, J. Killens, and B. J. Blalock, "A Programmable Current Mirror for Analog Trimming Using Single-Poly Floating Gate Devices in Standard CMOS Technology," IEEE Trans. on Circuits and Systems II, vol. 48, no. 1, pp. 100-102, Jan. 2001.

B. J. Blalock, H. W. Li, P. E. Allen, and S. A. Jackson, "Body-Driving as a Low-Voltage Analog Design Technique for CMOS Technology," invited paper in the Proc. 2000 Southwest Symp. on Mixed-Signal Design, 2000, pp. 113-118.

S. A. Jackson and B. J. Blalock, "An Active Substrate Driver for Mixed-Voltage SOI Systems On A Chip," in Proc. 2000 Southwest Symp. on Mixed-Signal Design, 2000, pp. 83-86.

B. J. Blalock and S. A. Jackson, "A 1.2-V CMOS Four-Quadrant Analog Multiplier," in Proc. 1999 Southwest Symp. on Mixed-Signal Design, 1999, pp. 1-4.

M. M. Mojarradi, E. Brandon, U. Lieneweg, R. Bugga, E .Wesseling, H. Li, and B. Blalock, "Power Management and Distribution for Systems on a Chip Applications," AIAA Conference, Paper 284, Albuquerque, New Mexico, Sept. 27-30, 1999.

B. J. Blalock, P. E. Allen, and G. A. Rincon-Mora, "Designing 1-V Op Amps using Standard Digital CMOS Technology," IEEE Trans. on Circuits and Systems II, vol. 45, no. 7, pp. 769-780, July 1998.

S. A. Jackson and B. J. Blalock, "A CMOS Mixed-Signal Simultaneous Bidirectional Signaling I/O," in Proc. 1998 IEEE Midwest. Symp. Circuits Syst, 1998, pp. 37-40.

B. J. Blalock, "A 1-Volt CMOS Wide Dynamic Range Operational Amplifier," (Ph.D. Dissertation, School of ECE, Georgia Institute of Technology, Atlanta, GA, 1996), © June 5, 1997.

B. J. Blalock and P. E. Allen, "A One-Volt, 120-µW, 1-MHz OTA for Standard CMOS Technology," in Proc. 1996 IEEE Int. Symp. Circuits Syst, 1996, pp. 305-307.

B. J. Blalock and P. E. Allen, "A Low-Voltage, Bulk-Driven MOSFET Current Mirror for CMOS Technology," in Proc. 1995 IEEE Int. Symp. Circuits Syst, 1995, pp. 1972-1975.

P. E. Allen, B. J. Blalock, and G. A. Rincon, "A 1-Volt CMOS Op Amp Using Bulk-Driven MOSFETs,'' in Dig. 1995 IEEE Int. Solid-State Circuits Conf., Feb. 1995, pp. 192-193.

P. E. Allen, B. J. Blalock and G. A. Rincon, "Low-Voltage Analog Circuits Using Standard CMOS Technology," Proc. 1995 IEEE Int. Symp. Low Power Design, 1995, pp. 209-214.

P. E. Allen and B. J. Blalock, "The Influence of Device Selection on the Performance of a Simple BiCMOS Operational Amplifier," in Proc. 1992 IEEE Midwest Symp. Circuits & Syst., 1992, pp. 912-915.

P. E. Allen, B. J. Blalock, and S. W. Milam, "Active filters using low-gain amplifiers," in The Circuits and Filters Handbook, CRC press, Inc., 1995.